to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation (http://www.renesas.com) send any inquiries to http://www.renesas.com/inquiry.
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? 1999,2000 mos field effect transistor 2sk3430 switching n-channel power mos fet data sheet document no. d14599ej3v0ds00 (3rd edition) date published july 2002 ns cp(k) printed in japan the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information. description the 2sk3430 is n-channel mos field effect transistor designed for high current switching applications. features ? super low on-state resistance: r ds(on)1 = 7.3 m ? max. (v gs = 10 v, i d = 40 a) r ds(on)2 = 15 m ? max. (v gs = 4 v, i d = 40 a) ? low c iss : c iss = 2800 pf typ. ? built-in gate protection diode absolute maximum ratings (t a = 25c) drain to source voltage (v gs = 0 v) v dss 40 v gate to source voltage (v ds = 0 v) v gss 20 v drain current (dc) (t c = 25c) i d(dc) 80 a drain current (pulse) note1 i d(pulse) 200 a total power dissipation (t c = 25c) p t 84 w total power dissipation (t a = 25c) p t 1.5 w channel temperature t ch 150 c storage temperature t stg ?55 to +150 c single avalanche current note2 i as 37 a single avalanche energy note2 e as 137 mj notes 1. pw 10 s, duty cycle 1% 2. starting t ch = 25c, v dd = 20 v, r g = 25 ? , v gs = 20 0 v ordering information part number package 2sk3430 to-220ab 2sk3430-s to-262 2sk3430-zj to-263 2sk3430-z to--220smd note note to-220smd package is produced only in japan. (to-220ab) (to-262) (to-263 ,to-220smd) the mark ! shows major revised points.
data sheet d14599ej3v0ds 2 2sk3430 electrical characteristics (t a = 25 c) characteristics symbol test conditions min. typ. max. unit zero gate voltage drain current i dss v ds = 40 v, v gs = 0 v10 %& a gate leakage current i gss v gs = 20 v, v ds = 0 v # 10 %& a gate cut-off voltage v gs(off) v ds = 10 v, i d = 1 ma 1.5 2.0 2.5 v forward transfer admittance | y fs |v ds = 10 v, i d = 40 a2040s r ds(on)1 v gs = 10 v, i d = 40 a 5.9 7.3 m " drain to source on-state resistance r ds(on)2 v gs = 4 v, i d = 40 a 10.5 15 m " input capacitance c iss v ds = 10 v, 2800 pf output capacitance c oss v gs = 0 v, 730 pf reverse transfer capacitance c rss f = 1 mhz 320 pf turn-on delay time t d(on) v dd = 20 v, i d = 40 a 110 ns rise time t r v gs = 10 v 1800 ns turn-off delay time t d(off) r g = 10 " 170 ns fall time t f 350 ns total gate charge q g v dd = 32 v50nc gate to source charge q gs v gs = 10 v10nc gate to drain charge q gd i d = 80 a14nc body diode forward voltage v f(s-d) i f = 80 a, v gs = 0 v1.0v reverse recovery time t rr i f = 80 a, v gs = 0 v50ns reverse recovery charge q rr di/dt = 100 a/ %& s77nc test circuit 1 avalanche capability r g = 25 ? 50 ? pg. l v dd v gs = 20 0 v bv dss i as i d v ds starting t ch v dd d.u.t. test circuit 3 gate charge test circuit 2 switching time pg. r g 0 v gs d.u.t. r l v dd = 1 s duty cycle 1% v gs wave form i d wave form v gs 10% 90% v gs 10% 0 i d 90% 90% t d(on) t r t d(off) t f 10% i d 0 t on t off pg. 50 ? d.u.t. r l v dd i g = 2 ma
data sheet d14599ej3v0ds 3 2sk3430 typical characteristics (t a = 25 c ) derating factor of forward bias safe operating area t ch - channel temperature - ?c dt - percentage of rated power - % 040 20 60 100 140 80 120 160 100 80 60 40 20 0 t c - case temperature - ? c p t - total power dissipation - w 0 0 80 20 40 60 100 140 120 160 total power dissipation vs. case temperature 20 40 60 80 100 140 120 forward bias safe operating area 1 10 100 i d - drain current - a 0.1 v ds - drain to source voltage - v 1 10 100 1000 0.1 100 s 1 ms 10 ms pw = 10 s i d(pulse) i d(dc) power dissipation limited dc r ds(on) limited (at v gs = 10 v) t c = 25 ? c single pulse pw - pulse width - s transient thermal resistance vs. pulse width r th(t) - transient thermal resistance - ?c /w 10 0.01 0.1 1 100 1000 1 m 10 m 100 m 1 10 100 1000 single pulse 10 100 r th(ch-c) = 1.49 ?c /w r th(ch-a) = 83.3 ?c /w
data sheet d14599ej3v0ds 4 2sk3430 forward transfer characteristics v gs - gate to source voltage - v i d - drain current - a pulsed 1234 5 6 v ds = 10 v 10 1 0.1 100 1000 t a = ?4 0 ? c 25 ? c 75 ? c 150 ? c forward transfer admittance vs. drain current i d - drain current - a | y fs | - forward transfer admittance - s 0.01 0.1 1 10 100 10 100 0.1 0.01 1 pulsed t a = 150 ? c 75 ? c 25 ? c ?4 0 ? c v ds = 10 v drain to source on-state resistance vs. drain current i d - drain current - a r ds(on) - drain to source on-state resistance - m ? 5 10 15 20 25 10 1 100 1000 pulsed 0 v gs = 4.0 v 10 v gate to source threshold voltage vs. channel temperature t ch - channel temperature - ? c v gs(th) - gate to source threshold voltage - v 0.5 v ds = 10 v i d = 1 ma 1.0 1.5 2.0 2.5 3.0 ? 50 0 50 100 150 0 drain to source on-state resistance vs. gate to source voltage v gs - gate to source voltage - v r ds(on) - drain to source on-state resistance - m ? 0 0 4 8 12 16 20 10 pulsed 20 i d = 40 a drain current vs. drain to source voltage v ds - drain to source voltage - v i d - drain current - a 0 2 3 4 100 50 150 200 250 300 1 pulsed v gs =10 v 4.0 v
data sheet d14599ej3v0ds 5 2sk3430 drain to source on-state resistance vs. channel temperature t ch - channel temperature - ? c r ds(on) - drain to source on-state resistance - m ? 0 ? 50 4 8 12 0 50 100 150 i d = 40 a 16 20 24 v gs = 4.0 v pulsed v gs = 10 v capacitance vs. drain to source voltage v ds - drain to source voltage - v c iss , c oss , c rss - capacitance - pf 100 1000 10000 100000 0.1 1 10 100 v gs = 0 v f = 1 mhz c oss c rss c iss reverse recovery time vs. drain current i d - drain current - a t rr - reverse recovery time - ns di/dt = 100 a/ s v gs = 0 v 1 0.1 10 1.0 10 100 1000 100 dynamic input/output characteristics v gs - gate to source voltage - v q g - gate charge - nc v ds - drain to source voltage - v 0 0 20 30 10 40 50 60 70 80 10 20 30 40 50 60 70 80 2 0 4 6 8 10 12 14 16 v ds v gs v dd = 32 v 20 v 8 v i d = 80 a source to drain diode forward voltage 1.0 i sd - diode forward current - a 0 1.5 v sd - source to drain voltage - v 0.5 pulsed 0.1 1 10 100 1000 v gs = 0 v v gs = 10 v switching characteristics i d - drain current - a t d(on) , t r , t d(off) , t f - switching time - ns 100 10 1 0.1 1000 10000 10 100 t f t r t d(on) t d(off)
data sheet d14599ej3v0ds 6 2sk3430 single avalanche current vs. inductive load l - inductive load - h i as - single avalanche current - a 1 10 100 1 m10 m v dd = 20 v r g = 25 ? v gs = 20 0 v i as = 37 a 10 100 0.1 e a s = 137 mj single avalanche energy derating factor starting t ch - starting channel temperature - ? c energy derating factor - % 25 50 75 100 160 140 120 100 80 60 40 20 0 125 150 v dd = 20 v r g = 25 ? v gs = 20 0 v i as 37 a
data sheet d14599ej3v0ds 7 2sk3430 package drawings (unit: mm) 1) to-220ab(mp-25) 4.8 max. 1.gate 2.drain 3.source 4.fin (drain) 1 2 3 10.6 max. 10.0 typ. 3.60.2 4 3.00.3 1.30.2 0.750.1 2.54 typ. 2.54 typ. 5.9 min. 6.0 max. 15.5 max. 12.7 min. 1.30.2 0.50.2 2.80.2 2) to-262(mp-25 fin cut) 4.8 max. 1.gate 2.drain 3.source 4.fin (drain) 1 2 3 10 typ. 1.30.2 0.750.3 2.54 typ. 2.54 typ. 8.50.2 12.7 min. 1.30.2 0.50.2 2.80.2 1.00.5 4 3) to-263 (mp-25zj) 1.40.2 1.00.5 2.54 typ. 2.54 typ. 8.50.2 123 5.70.4 4 4.8 max. 1.30.2 0.50.2 1.gate 2.drain 3.source 4.fin (drain) 0.70.2 10 typ. 0.5r typ. 0.8r typ. 2.80.2 4) to-220smd (mp-25z) note 10 typ. 1.40.2 1.00.5 2.54 typ. 2.54 typ. 8.50.2 123 3.00.5 1.10.4 4 4.8 max. 1.30.2 0.50.2 0.5r typ. 0.8r typ. 0.750.3 2.80.2 1.gate 2.drain 3.source 4.fin (drain) note this package is produced only in japan. . remark the diode connected between the gate and source of the transistor serves as a protector against esd. when this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. equivalent circuit source body diode gate protection diode gate drain
2sk3430 m8e 00. 4 the information in this document is current as of july, 2002. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ?
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